HLSL Working Group

2026-10-01 - HLSL Working Group Minutes

Discussion Topics

  • What’s Happening in HLSL
  • Matrix representation in SPIR-V
  • Transpose optimizations
  • Intrinsic naming across targets
  • Requests for Review

Meeting Notes

What’s Happening in HLSL

From September 17th to Octbober 1st there were 87 PRs merged in HLSL-related areas.

  • HLSL Frontend
    • The SV_InstanceID semantic was implemented
    • Dynamic resource support was added
    • A number of atomic functions and resource methods were implemented
    • Packed types were added
    • Matrix support was improved and expanded upon
  • DirectX Backend
    • Atomic support was improved
    • Resource handling was improved for updatecounter, 64-bit ByteAddressBufferAccesses, doubles, non-unique resources, and UAV texture loads.
  • SPIR-V Backend
    • Various legalization and lowering improvements were made
    • Some tests were audited for proper check lines and spirv-val usage
  • Offload Test Suite
    • Many tests were added
    • Variable rate shading support is now testable
    • Various XFAILs were removed
  • Other
    • The NewPM for CodeGen work continues
    • Some more canonical GEP work has landed

46 new PRs were opened, and there are 56 ongoing PRs.

For a full list of merged PRs, see the appendix.

Matrix Representation in SPIR-V

Gregory asked about our representation of matrices when lowering to SPIR-V. We currently represent matrix types as flat vectors in LLVM IR, which doesn’t map to SPIR-V types but is instead legalized into consecutive small vectors. Farzon mentioned that Steven had pushed for the representation in the past, but no one has specific pointers to previous conversations. Gregory pointed out that there are some issues here with long vectors showing up in the resulting SPIR-V, and Josh pointed at llvm/llvm-project#225961, which discusses some known issues with legalization of intrinsics involving vectors.

Transpose optimizations

Farzon brought up llvm/llvm-project#224172, which attempts to recognize matrix transposes in instcombine. This apparently causes issues for apple’s use of matrix, since folding the transposes will cause LowerMatrixIntrinsics to lose information about the matrix shape. There is unplanned work to add intrinsics to assert the matrix shape that would resolve this, but we need to figure out what to do in the shorter term.

Running LMI for HLSL seems heavy-handed, as it is designed around much larger matrices. On the other hand, handling transposes in target or language specific passes is a workaround that is probably wasted work. We need to have further discussions with the apple folks to determine the best way forward.

Intrinsic Naming Across Targets

Chris pointed out that HLSL’s current handling of intrinsics across the DirectX and SPIR-V backends is inflexible and needs revisiting. Notably, because we expect the same name between the two backends, we leak HLSL-isms into the SPIR-V names and are causing some confusion.

We should move to leveraging clang’s tablegen based builtin handling to improve the situation here.

Requests for Review

There were no requests for review this week.

Appendix: Merged PRs

HLSL Frontend

  • [HLSL] Implement the SV_InstanceID semantic (llvm/llvm-project#221091)
  • [HLSL] Add support for dynamic resources (llvm/llvm-project#221103)
  • [HLSL] Add InterlockedMax function and resource methods (llvm/llvm-project#222160)
  • [HLSL] Add InterlockedExchange function and resource methods (llvm/llvm-project#222161)
  • [HLSL] Add float overload for InterlockedExchange (llvm/llvm-project#222163)
  • [HLSL] Add InterlockedCompareStore function and resource methods (llvm/llvm-project#222164)
  • [HLSL] Add InterlockedCompareExchange function and resource methods (llvm/llvm-project#222165)
  • [HLSL] Add InterlockedCompareStoreFloatBitwise function and resource methods (llvm/llvm-project#222166)
  • [HLSL] Add InterlockedCompareExchangeFloatBitwise function and resource methods (llvm/llvm-project#222167)
  • [HLSL][LongVector] Implement fmod (llvm/llvm-project#224123)
  • [HLSL] Add Packed Types for pack_ and unpack_ intrinsics (llvm/llvm-project#224277)
  • [HLSL][Sema] Reject unsupported vector swizzles (llvm/llvm-project#225286)
  • [HLSL] Preserve matrix layout as AST storage metadata (llvm/llvm-project#225519)
  • [HLSL][Matrix] Convert loaded bool matrices to i1 (llvm/llvm-project#226599)
  • [HLSL] Fold inverse matrix transposes (llvm/llvm-project#227049)
  • [HLSL] Fix -Wunused-variable in #225519 (llvm/llvm-project#227059)
  • [HLSL] Extract matrix elementwise cast operands from SSA (llvm/llvm-project#227065)
  • [Clang][HLSL] Keep matrix SSA values in column-major order (llvm/llvm-project#227087)
  • [Matrix] Implement matrix support for the abs intrinsic (llvm/llvm-project#227131)
  • [Clang][HLSL] Reject matrix layout modifiers on array typedefs (llvm/llvm-project#227364)

DirectX Backend

  • [DirectX] Support cmpxchg on buffer resources in DXIL lowering (llvm/llvm-project#222162)
  • [HLSL][DirectX] handle updatecounter in dxil resource access pass (llvm/llvm-project#223591)
  • [DirectX] Fix DXIL expansion of 64-bit ByteAddressBuffer stores (llvm/llvm-project#224136)
  • [DirectX] Fix RawBuffer Loads of double vectors (llvm/llvm-project#224695)
  • [HLSL][DirectX] report a fatal error when resource access is not guaranteed to be unique (llvm/llvm-project#225285)
  • [DirectX] Set TypedUAVLoadAdditionalFormats on UAV texture loads (llvm/llvm-project#225484)
  • [DirectX] Preserve all shader-stage bits during DXIL op lowering (llvm/llvm-project#225874)

SPIR-V Backend

  • [SPIRV] Translate {uinc/udec}_wrap as opaque intrinsics for AMD (llvm/llvm-project#215507)
  • [SPIR-V] Preserve constexpr vectors as OpSpecConstantComposite (llvm/llvm-project#215794)
  • [SPIR-V] Correct predicated load/store opcode values (llvm/llvm-project#220062)
  • [SPIR-V] Fix wrong element inferred for long vectors when using ByteAdressBuffer (llvm/llvm-project#222220)
  • [SPIRV] Support structurizing nested break chains (llvm/llvm-project#222459)
  • [SPIR-V] Keep structs packed when nested type deduction rebuilds them (llvm/llvm-project#222968)
  • [SPIR-V] Sign extend narrow ints feeding sitofp (llvm/llvm-project#222969)
  • [SPIR-V] Add storage class bits to fence and generic atomic semantics (llvm/llvm-project#223023)
  • [SPIR-V] Fold same type conversions into a copy (llvm/llvm-project#223365)
  • [SPIRV] Fix compile abort on a switch case value shared with a module constant (llvm/llvm-project#223548)
  • [SPIR-V] Skip debug type sizes wider than 32 bits (llvm/llvm-project#223678)
  • [SPIR-V] Emit NoCapture function parameter decoration for captures(none) args (llvm/llvm-project#223694)
  • [SPIR-V] Emit FuncParamAttr Zext/Sext for return type attributes (llvm/llvm-project#223724)
  • [SPIRV] Emit NonSemantic DebugValue (llvm/llvm-project#224158)
  • [SPIR-V] Preserve struct name when rebuilding nested types (llvm/llvm-project#224544)
  • [SPIRV] Rename pass to SPIRVLegalizeResourceBinding (llvm/llvm-project#224747)
  • [SPIR-V][NewPM] Do not require RegBankSelect in instruction selection (llvm/llvm-project#225023)
  • [SPIR-V] Emit variable pointer capability for resources (llvm/llvm-project#225471)
  • [SPIR-V] Fix ldexp exponent splat for vectors wider than four elements (llvm/llvm-project#225617)
  • [SPIRV] Fix -Wunused-variable in #224488 (llvm/llvm-project#225897)
  • [SPIR-V] Sign extend narrow G_SMIN/G_SMAX operands and mask sign sensitive results (llvm/llvm-project#226957)
  • [NFC][SPIR-V] Add spirv-val RUN lines where missing (llvm/llvm-project#227245)
  • [NFC][SPIR-V] Fix CHECK lines that never fire in tests (llvm/llvm-project#227332)

Offload Test Suite

  • Add pack_, pack_clamp_ and unpack_ tests (llvm/offload-test-suite#1432)
  • Split tables by tier (llvm/offload-test-suite#1470)
  • Add matrix tests for pure float->float intrinsics (llvm/offload-test-suite#1471)
  • Migrate AMD machine to frequent build (llvm/offload-test-suite#1514)
  • Add test for Barrier (llvm/offload-test-suite#1517)
  • Add *MemoryBarrier tests (llvm/offload-test-suite#1518)
  • Add *groupsync tests (llvm/offload-test-suite#1519)
  • [Metal][Vulkan][DirectX] Add MSAA render target support (llvm/offload-test-suite#1520)
  • [Clang][D3D12] Remove passing XFAILS (llvm/offload-test-suite#1521)
  • Add Texture1D Tests (llvm/offload-test-suite#1522)
  • [Clang][D3D12] Remove passing XFAIL (llvm/offload-test-suite#1523)
  • Add RWTexture1D tests and Texture1D GetDimensions test (llvm/offload-test-suite#1524)
  • Add interlockedXor BAB xfail (llvm/offload-test-suite#1525)
  • [DirectX][Metal][Vulkan] Add support for multiple viewports and SV_ViewportArrayIndex (llvm/offload-test-suite#1526)
  • Remove InterlockedMax unimplemented xfail (llvm/offload-test-suite#1528)
  • Add Texture1DArray and RWTexture1DArray tests (llvm/offload-test-suite#1529)
  • [AMD][VK] Disable Matrix comparison operations for 64 bit integers on AMD (llvm/offload-test-suite#1532)
  • [DirectX][SPIRV] Add variable rate shading support (llvm/offload-test-suite#1533)
  • Add Texture3D and RWTexture3D tests (llvm/offload-test-suite#1534)
  • Update InterlockedExchange clang implementation xfails (llvm/offload-test-suite#1536)
  • Remove clang implementation xfails for WaveReadLaneFirst (llvm/offload-test-suite#1538)
  • Add WaveGetLaneCount tests (llvm/offload-test-suite#1541)
  • XFAIL when Arm64 & Warp & Clang on InterlockedExchange.int64.test (llvm/offload-test-suite#1543)
  • Fix warning by reordering class fields in DXPipelineState (llvm/offload-test-suite#1544)
  • Update Clang XFAILs for isinf and isnan matrix tests (llvm/offload-test-suite#1546)
  • Remove Clang XFAILs from abs matrix tests (llvm/offload-test-suite#1547)

Other

  • [clang] Disambiguate lambdas from Microsoft attributes (llvm/llvm-project#214247)
  • [GlobalISel] [AArch64] Skip redundant shift amount masking during isel (llvm/llvm-project#223136)
  • [Object] Widen data size calculation to 64-bits to prevent overflow (llvm/llvm-project#224635)
  • CodeGen: Move DataLayout computation to CodeGenTargetMachineImpl’s ctor (llvm/llvm-project#224894)
  • [llvm] Remove declarations without definitions (NFC) (llvm/llvm-project#225020)
  • [NewPM] Match LegacyPM behavior for opt-bisect in passes (llvm/llvm-project#225439)
  • Remove unneeded cl::Optional and cl::ZeroOrMore. NFC (llvm/llvm-project#225628)
  • Remove unneeded cl::Optional from named options. NFC (llvm/llvm-project#225870)
  • TargetMachine: Remove pointer-size query methods (llvm/llvm-project#226404)
  • [IRBuilder] Produce canonical constexpr GEPs (llvm/llvm-project#226425)
  • [clang][AST] Make Result parameter of isCXX11ConstantExpr mandatory (llvm/llvm-project#226493)

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